1. Field of the Invention
The present invention relates generally to the semiconductor art and more particularly to a semiconductor device capable of easy wafer positioning by recognizing a pattern fabricated or formed on a wafer using a photoetching process, for instance.
2. Prior Art
FIG. 1 shows an outline of a semiconductor device wherein elements 20a and 20b having approximately the same area are fabricated on the same chip 20 to be cut out of a wafer 10.
Referring to FIG. 1, 30 denotes a region by which two or more elements formed on one chip are sectionalized. This region will be referred to as "a street". Dot-dash lines X.sub.1, X.sub.2 and Y.sub.1, Y.sub.2 denote scribe lines along which a wafer and a chip 20 on which are fabricated elements 20a and 20b having approximately the same area are cut out. 5 denotes a monitor pattern formed at a corner of each chip for pattern recognition.
Although a region along which a wafer is cut out is usually called "a street", it will be understood that the term will be limited to the previously mentioned particular case according to this invention.
Now, pattern recognition consists of irradiation, for example, by a scanning laser beam, upon a wafer on which a pattern is fabricated and sensing the pattern by means of an image sensor such as a CCD (charge coupled device) for recognition of the entire pattern of an element or X- and Y-axis scribe lines for wafer positioning control. This is followed by processes such as alignment, scribing, etc.
Pattern recognition takes place, as shown at 4 in FIG. 1, by irradiating a scanning laser beam upon the region 4 bounded by dotted lines on the wafer 10.
In pattern recognition, for instance, the region 4 bounded by dotted lines on the wafer is irradiated with a scanning laser beam and the individual element patterns are discriminated from each other by only sensing X- and Y-axis scribe lines, without sensing the overall patterns, in order to shorten the processing time.
Scattered reflections take place from the regions of scribe lines Y.sub.1 and Y.sub.2 and the street 30 within the chip as shown in FIG. 2, when the wafer is irradiated with a laser beam.
Since the intensity of light reflected from these regions is attenuated, an output waveform as shown in FIG. 2 is obtained. However, there may arise a possibility of erroneous recognition of the individual patterns, because the scribe lines and the street have approximately the same reflection factor.
This will result in an alignment process under conditions of erroneous pattern recognition or in cutting out chips along X.sub.1 and X.sub.2 scribe lines (dot-dash line) and streets Ya and Yb (shown dotted) and at times, chips may be cut out so as to break up some elements into fragments.
There has been a problem of the occurrence of defects in the alignment process caused by erratic pattern recognition in cases where the pattern is relatively simple, i.e., that of a variable-capacitance diode.
A process of irradiation of a laser beam upon the entire patterns to recognize monitor patterns in the individual patterns to solve such a problem used to become a cause for inability of a high-speed wafer processing, that is, productivity used to be greatly sacrificed.
In other words, such a process could not be recommended and there remained room for improvements.